Chuanqi Zang

Chuanqi (臧传奇) Zang

My research interests are Computer Architecture, GPGPU High Performance computing and Memory Management ,espacially Cache, My Advisor is Lei Ju.

I received Bachelor’s degree in School of Information Science and Engineering at University of JiNan in 2015 and  Master’s degree in School of Computer Science and Technology at Shandong University in June 30, 2018 .

Now I am a Development Engineer at Alibaba Inc.  in HangZhou, China.


  1. Shared Last-level Cache Management for GPGPUs with Hybrid Main Memory. ( DATE 2017  BEST PAPER NOMINATION)
  2. Shared Last-Level Cache Management and Memory Scheduling for GPGPUs with Hybrid Main Memory.  (TECS 2018)
  3. Compiler-assisted Cache Coherence for GPGPU (Master Thesis)

In this work, we exploit private cache to improve the performance of GPUs.we use data
analysis and control flow analysis to eliminate cache coherence problem and mitigate the
cache congestion by global memory access.


        1. SDU-Legend for DAC 2018 System design contest     3rd place!
        The 2018 System Design Contest features embedded system implementation of neural network based object detection for drones. Contestants will receive training dataset provided by our industry sponsor DJI, and a hidden dataset will be used to evaluate the performance of the designs in terms of accuracy and power.  
        Finally, we get 0.687 accuracy with ~24fps in Jetson TX2 under 10W power consume.